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EMULATION(Palladium)

Job Description Knowledge of CPU microarchitectures Experience in deep submicron process technology nodes is strongly preferred Knowledge of library cells and optimizations from ARM, TSMC, and other high performance library vendors Solid understanding industry standard tools for FPGA and Emulation platforms FPGA and emulator flows and methodologies Verilog and SystemVerilog Emulator platforms (Cadence Palladium), platform […]
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POST SILICON VALIDATION

Job Description Basics of SOC architecture, interconnect, and power management aspects Bring-up and validation on FPGA/emulation platforms and on new SOC designs Good knowledge of ARM Cortex-A7) / x86 / PowerPC CPU and memory system architecture Bare metal/Linux driver development experience. Experience in Firmware development, C language expertise for low level programming, Assembly language for […]
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VERIFICATION ENGINEER

Job Description Good understanding of Verilog, SV and UVM concept. Hands on exp in writing UVM based testbench. Good debugging skills. Knowledge of AHB/AXI protocol. Worked on Assertion based verification. Should have knowledge of FIFO and command/response based verification Knowledge of cryptography/random number generator and security concept is advantage. Formal or jasper understanding. Worked on […]
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STA ENGINEER

Job Description Experience in ASIC synthesis Expertise in Synopsys/Cadence Synthesis tools Expertise with STA with prime time Good Experience in synthesis timing closure and interactions with DFT and PD. Expertise in Low power flows for CLP, UPF ( Cadence low power, Unified power format) Experience in formal verification with Cadence LEC Expertise in ECO flows […]
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PHYSICAL DESIGN

Job Description Place & Route tool experience on Cadence Innovus and/or Synopsys ICC2 Timing closure experience in Synopsys PTSI Formal verification experience Physical verification experience Skills PTSI ICC2
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DFT ENGINEER

Job Description In depth knowledge of DFT concepts In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis In depth knowledge and hands on experience in MBIST insertion and Memory test validation Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing […]
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ENGINEERING MANAGER- LINUX

Job Description Strong Embedded Software Developer Strong in C/C++ Python skills will be good Knowledge in Artificial Intelligence and CNN will be plus Linux, Firmware and Device Driver development Ability to manage and build team Strong debugging skills Guide team technically Work with Marketing/Sales team in scaling business Teamwork Should have the ability to groom […]
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DIGITAL MARKETING MANAGER

Job Description Candidate must have strong Marketing Skills Good Written and Oral communication Define Product Strategy by analyzing market requirements Identify New Market segments based on Emerging trends Perform Competitor Analysis Content creation for product marketing Experience in Semiconductor and System Market Experience in Digital Marketing, Social Media reach Skills Product Strategy Competitor Analysis Content […]
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LINT/CDC – RTL Design

Job Description Developing new methodologies in CDC/Lint checks etc Candidate should be well versed with RTL quality checks, Lint, CDC, RDC etc Candidate should be actively hands-on and well versed with scripting eg: PERL, Python and TCL. Candidate should be familiar with Verilog, System Verilog etc. Hands on experience with SpyGlass or VC-SpyGlass, scripting languages […]
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RTL IP DESIGN

Job Description Proven success in development of complex ASIC, FPGAs and products. Demonstrated capability to design major blocks involving ASIC, IPs, logic, and FPGAs. Excellent logic developer in Verilog / System Verilog. Aware of ASIC design flow. Experience with frontend design tools (Xcelium/Incisive, LINT tools, Genus/Design-Compiler, STA with Tempus/Primetime, power analysis); expert in at least […]
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