Mobiveil and Avery Design Systems extend partnership to accelerate design and verification of NVMe 2.0-enabled SSD development

  • Home
  • Press Releases
  • 2022
  • Mobiveil and Avery Design Systems extend partnership to accelerate design and verification of NVMe 2.0-enabled SSD development

MILPITAS, CALIF. –– August 2, 2022 –– Mobiveil, Inc and Avery Design Systems today announced an expanded partnership to help customers accelerate NVMe based SSD design and verification. The complementary IP/VIP solution combines Mobiveil’s design IP for NVM Express, DDR4 and LDPC IPs with Avery’s verification IPs for NVMe, DDR4 and ONFI and NVMe virtual platform solutions. The two companies are also collaborating on SSD emulation platforms.

NVMe technology is the leading interface for SSDs, with potential for tremendous market growth worldwide. NVMe architecture is designed for future SSD development and form factors, as we enter a new era in hyperscale and enterprise computing that drives digital transformation.

“As the NVMe standard continues to evolve to meet new and changing requirements, it is important that product developers have access to design and verification solutions that allow them to take full advantage of the latest features, and are complaint with the standard. Our NVMe VIP and virtual platform solutions provide pre-silicon SSD SoC hardware and system-level verification solutions for latest NVMe 2.0 designs. Our partnership with Mobiveil means that together we can deliver best in class IP design and verification solutions to our customers including simulation, FPGA emulation, and virtual system platforms,” said Chris Browy, vice president of sales and marketing at Avery.

Mobiveil’s UNEX™ NVM Express Controller IP and Avery NVMe-Xactor supports latest NVMe 2.0 specifications.

  • Namespace Types support
  • Simple copy command
  • Zoned Namespace command set
  • Key value (KV) command set
  • 32b/64b CRC based End to End protection
  • NVM Set and Endurance Group Management

In addition, Mobiveil’s ONFI/Toggle IP (EFC™) supports the latest ONFI 5.0 specifications. Both these IPs are fully verified using Avery Design’s NVMe/PCIe and ONFI VIP solutions.

Avery offers a complementary set of VIPs for NVMe to ensure comprehensive verification and protocol and timing compliance. It includes a complete set of models, protocol checkers, and compliance testsuites in 100% native SystemVerilog and UVM. And the support for Virtual Platform co-simulation enable fully system-level verification including running UNH-IOL INTERACT™ and other linux-based performance analysis applications on pre-silicon NVMe SoC design.

“By providing pre verified and interoperated SSD Design IPs and Verification IPs, both companies allow SOC design and verification teams to focus on their primary goal of full chip design and verification, thus significantly reducing their time to market,” said Ravi Thummarukudy, Mobiveil CEO. “By leveraging the intellectual property provided by these companies with specification compliant solutions, designers can be assured of first-time success for their SOC designs”

About Mobiveil, Inc.

Mobiveil is a fast‐growing technology company that specializes in the development of Silicon Intellectual Property (SIP), platforms and solutions for Storage, IoT and Communications

markets. It leverages decades of experience in delivering high‐quality, production‐proven,

high-speed serial interconnect SIP cores, and custom and standard form factor hardware boards to leading semiconductor companies worldwide. For the SSD market, Mobiveil provides NVM Express Controller (UNEX™), Universal Memory Controller (UMMC™), ONFI/Toggle (EFC™) and LDPC IP blocks as well as a Xilinx and Intel based FPGA validation platforms.

Mobiveil is headquartered in Milpitas, Calif., with engineering development centers located in Chennai, Bangalore and Hyderabad, India, and sales offices and representatives located in U.S., Europe, Israel, Japan, Taiwan and China. More information about Mobiveil can be found at

About Avery Design Systems

Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for gate-level X-pessimism verification and real X root cause and sequential backtracing; and robust core-through-chip-level Verification IP for PCI Express, CXL, CCIX, Gen-Z, USB, AMBA, UFS, MIPI CSI/DSI, I3C, DDR/LPDDR, HBM, ONFI/Toggle/NOR, NVM Express, SATA, AHCI, SAS, eMMC, SD/SDIO, CAN FD, and FlexRay standards. The company has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information about the company may be found at