Quality Assurance and Testing

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Job Description Good understanding of Verilog, SV and UVM concept. Hands on exp in writing UVM based testbench. Good debugging skills. Knowledge of AHB/AXI protocol. Worked on Assertion based verification. Should have knowledge of FIFO and command/response based verification Knowledge of cryptography/random number generator and security concept is advantage. Formal or jasper understanding. Worked on […]
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Job Description Place & Route tool experience on Cadence Innovus and/or Synopsys ICC2 Timing closure experience in Synopsys PTSI Formal verification experience Physical verification experience Skills PTSI ICC2
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Verification Lead/Manager – Above 9 years experience Senior Verification – 2 to 8 years Job Description Experience in developing TB & TB components for block level and full chip level verification Experience in creating Test plan, writing Test cases Proficient in System Verilog\Verilog Proficient in writing Assertions UVM / OVM / VMM based Methodology with […]
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