RTL IP DESIGN
Job Description Proven success in development of complex ASIC, FPGAs and products. Demonstrated capability to design major blocks involving ASIC, IPs, logic, and FPGAs. Excellent logic developer in Verilog / System Verilog. Aware of ASIC design flow. Experience with frontend design tools (Xcelium/Incisive, LINT tools, Genus/Design-Compiler, STA with Tempus/Primetime, power analysis); expert in at least […]