Software Development

RTL IP DESIGN

Job Description Proven success in development of complex ASIC, FPGAs and products. Demonstrated capability to design major blocks involving ASIC, IPs, logic, and FPGAs. Excellent logic developer in Verilog / System Verilog. Aware of ASIC design flow. Experience with frontend design tools (Xcelium/Incisive, LINT tools, Genus/Design-Compiler, STA with Tempus/Primetime, power analysis); expert in at least […]
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IP DESIGN ENGINEER

Job Description Experience in ASIC/FPGA IP development – Architecture, Microarchitecture. Able to Perform RTL coding, Debugging in simulation and hardware, LINT/CDC, DC Synthesis Proficient in Synthesizable and parameterized RTL coding using Verilog Language Experience with synthesis and static timing tools on ASIC/FPGA Experience in protocols such as PCI-Express, NVM Express, DDR, RapidIO is a plus […]
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